1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and more specifically, it relates to a method for manufacturing a semiconductor memory element having a capacitor such as a DRAM.
2. Description of the Related Art
Semiconductor memory devices that store data by accumulating an electrical charge at a capacitor electrode in the known art include dynamic random access memory (DRAM), ferroelectric random access memory (FRAM). Extensive research has been conducted into further miniaturization of memory cells in these semiconductor storage devices in order to respond to the need for assuring a larger capacity for storage and for achieving higher integration of elements in recent years.
However, when memory cells are miniaturized, a problem arises in that since the capacity of the capacitor becomes reduced due to reduced capacitor area, erroneous operation in data call-out may be caused by noise or the so-called leak current, i.e., the accumulated electrical charge flowing out in the area between the capacitor portion and the electrode, may occur, which will result in data being changed. In addition, there is another problem in that when memory cells are more miniaturized, it becomes difficult to assure a sufficient capacitor capacity simply by forming a capacitor on the gate electrode.
As a means for addressing these problems, a method has been proposed whereby an insulating film material having a high dielectric constant is used as the capacitor insulating film. For instance, application of crystal having a perovskite crystal structure such as barium titanate strontium (Ba, Sr) TiO3: hereafter abbreviated to BST) which has a higher dielectric constant compared to those of SiO2 films and Si3N4 films by a factor of several tens as capacitor films in semiconductor memories such as DRAM described above, has been considered.
FIG. 10 illustrates a common method for manufacturing a DRAM using a film with a high dielectric constant such as a BST film. Namely, first, as illustrated in FIG. 10(a), after forming an n-type diffusion layer area 2 on, for instance, a p-type silicon substrate 1 through an ion implantation method, an oxide film is deposited through, for instance, the CVD (chemical vapor-phase epitaxy) method to form a layer insulating film 3. Next, by employing the photolithography method and dry etching technology, a contact hole passing through to the n-type diffusion layer 2 is formed, and following this step, a polycrystal silicon plug 4 is formed by doping phosphorus within the contact hole.
Then, as illustrated in FIG. 10(b), a barrier metal film (e.g., Ti, TiN) 5 and a capacitor lower electrode film (e.g., Ru) 6 are sequentially formed through sputtering, and by employing regular photolithography and etching technologies, a barrier metal 5 and a capacitor lower electrode 6 are formed.
Then, after forming a dielectric film (e.g., a BST film) 7 through, for instance, sputtering, a capacitor upper electrode (e.g., Ru) 8 is formed through sputtering, thereby completing the production of the memory capacitor portion of the DRAM, as illustrated in FIG. 10(c).
However, it has been confirmed that a phenomenon in which the dielectric constant of the dielectric film 7, which should be high, becomes reduced, occurs if the film thickness of the dielectric film 7 is reduced relative to that in the prior art in the method commonly adopted in the prior art described above. This phenomenon is considered to be the result of a particular state of the interfaces between the dielectric film 7 and the lower electrode 6 and between the dielectric film 7 and the upper electrode 8. As a means for achieving a good interface state by addressing this problem, the following methods for manufacturing a capacitor portion have been disclosed.
For instance, Japanese Unexamined Patent Publication No. 1997-82915 discloses a method for manufacturing a capacitor portion with good interfaces formed therein by performing a heat treatment after forming the upper electrode film or the lower electrode film on the film having a high dielectric constant. Namely, as illustrated in FIG. 11(a), first, element isolation areas 32 are formed on a p-type single crystal silicon substrate 31 and then after forming a thermally oxidized film and a polycrystal silicon film on the single crystal silicon substrate a gate electrode is formed 33. Next, after forming n-type diffusion areas 34 and 35 through ion implantation, a layer insulating film 36 which is constituted of an oxide film is formed. In the next step, contact holes which pass through to the n-type diffusion areas are formed at the layer insulating film 36, and a polycrystal silicon film 37 is formed inside a contact hole and an impurity such as phosphorus is added. Then, a tungsten silicide film is deposited and a bit line 38 is formed by adopting the photolithography and etching technologies. Next, an oxide film is deposited through the CVD method to form a layer insulating film 39, and then a polycrystal silicon film 40 containing arsenic is formed inside a contact hole and on the layer insulating film 39 and the polycrystal silicon film 40 is made to fill inside the contact hole.
Then, as illustrated in FIG. 11(b), after depositing a ruthenium film, a capacitor lower electrode 41 is formed. Next, as illustrated in FIG. 11(c), an amorphous BST film 42 is formed. In the following step, as illustrated in FIG. 11(d), a heat treatment is performed within an oxygen atmosphere at a temperature of, for instance, 700 centigrade to form a ruthenium oxide film 43 at the surface of the ruthenium film 41, thereby forming a good interface for the ruthenium film 41 and the BST film.
In addition, in Jpn. J. Appl. Phys. Vol. 36 (1997), a method for maintaining a good state for the interface between an electrode film and a BST film which is formed above the electrode film by using an oxide conductor having a perovskite crystal structure such as BaRuO3, SrRuO3 or the like to constitute the electrode. Namely, since, if a BST film is formed on a metal electrode such as Pt, a layer with a low dielectric constant is formed at the interface of the electrode and the BST film to reduce the dielectric constant, adoption of an oxide electrode having a perovskite crystal structure which will not form such a low dielectric constant layer is proposed. Furthermore, since the lattice constant of the oxide having such a perovskite crystal structure is very close to the lattice constant of the BST film which also has a perovskite crystal structure, their crystal lattices can achieve a better match when the BST film is formed on the perovskite oxide electrode, which makes it possible to maintain a good state for the interface between the BST film and the electrode. An even better interface condition can be achieved by improving the matching of the crystal lattices through the use of a single crystal BST film without any torsion in the lattice.
However, the structure disclosed in Japanese Unexamined Patent Publication No. 1997-82915 presents a problem in that since the elements constituting the BST film and the ruthenium electrode are made to solid dissolve only through a mutual diffusion achieved by the heat treatment, the heat treatment must be implemented at a high temperature of approximately 700 centigrade in an oxygen atmosphere, which results in the ruthenium electrode and the barrier metal (e.g., TiN) formed under the ruthenium electrode becoming oxidized to an excessive degree. This causes the conductivity of the electrode to become degraded, to reduce the apparent dielectric constant of the dielectric substance. In addition, since the coefficients of diffusion of the various elements constituting the BST film and the ruthenium electrode are different from one another, a transitional layer with an inconsistent composition is formed if the elements are caused to dissolve only through a mutual diffusion effected by the heat treatment. In particular, titanium oxide (TiO2) with a low dielectric constant will be formed in the transitional layer area having a composition with high Ti content, to reduce the apparent dielectric constant of the dielectric substance.
In addition, the structure disclosed in Jpn. J. Appl. Phys. Vol. 36 (1997) presents a problem in that it is extremely difficult to process the conductive material having a perovskite crystal structure which is used to constitute the electrode (e.g. BaRuO3, SrRuO3) through the dry etching technology. Namely, when an electrode material such as BaRuO3, SrRuO3 or the like is etched, a reaction product having a high melting point (namely, a halogen compound containing Ba or Sr) will be formed, which will not readily detach from the surface of the substance. For instance, BaCl2 and SrCl2 produced as a result of etching conductive materials such as BaRuO3 and SrRuO3 have extremely high melting points of 963 centigrade and 875 centigrade respectively, to present great difficulty in processing through the dry etching technology.
An object of the present invention, which has been completed by addressing the problems of the prior art discussed above, is to provide a new and improved method for manufacturing a semiconductor device through which a capacitor structure using a very thin dielectric film with a high dielectric constant can be manufactured with ease and at low cost by forming a transitional layer with a consistent composition at an interface of a ruthenium-type electrode and a dielectric substance having a perovskite structure with a high degree of efficiency.
In order to achieve the object described above, according to the present invention, a method for manufacturing a semiconductor device achieved by laminating a plurality of conductive electrodes constituted of at least one type of material selected from a group of high melting point noble metals comprising platinum, iridium and ruthenium, and a dielectric film constituted of a film with a high dielectric constant, e.g., a dielectric film having a perovskite structure, that comprises a step in which a first conductive electrode is formed, a step in which a first area where elements constituting the first conductive electrode and elements constituting a first dielectric film are melded is formed, a step in which a transitional layer is formed by performing a heat treatment on the first area where the elements are melded and a step in which the first dielectric film is formed on the first conductive electrode, is provided.
By adopting this structure, in which the area where the elements constituting the dielectric film and the elements constituting the lower electrode are melded is provided between the dielectric film and the lower electrode, a good transitional layer constituted of an oxide layer (BaXSrYRuZTiWO3 layer) can be achieved simply through the mutual diffusion effected by a heat treatment performed at a relatively low temperature. As a result, even when an extremely thin highly dielectric film is used, the leak current from the dielectric film is reduced to achieve good dielectric film characteristics. In addition, since this transitional layer is formed on the lower electrode while aligning itself on the lower electrode, the lower electrode, which corresponds to the SrRuO3 layer in the prior art can be formed easily. Thus, the dry etching step, which is required in the method in the prior art, can be omitted to achieve simplification in the manufacturing process which, in turn, will reduce the production costs and improve the yield.
In addition, since the sputtering quantities for the individual elements constituting the dielectric film, which is driven into the lower electrode can be varied in correspondence to the power of the high-frequency voltage applied to the semiconductor substrate by, for instance, forming the meld area while applying a high-frequency voltage to the semiconductor substrate where the conductive electrode is formed and forming a dielectric layer on the conductive electrode, control over the composition of the meld area is achieved.
Furthermore, a fully oxidized transitional layer can be formed by, for instance, forming the meld area within an oxidizing atmosphere in which the oxygen concentration within the gas composition is increased so that the oxygen content in the meld area can be increased. In addition, by adding a step in which a first conductive oxide film is formed on the first conductive electrode after the step in which the first conductive electrode is formed, a conductive oxide film (RuO2) which is an oxide of the lower electrode (e.g., Ru) can be formed at the front surface of the lower electrode and, as a result, the oxygen content in the meld area can be increased by achieving a fully oxidized transitional layer.
Moreover, by adding a step in which the elements constituting the dielectric substance are ion-implanted at the conductive electrode for the formation of the meld area, the elements constituting the dielectric film can be melded into the surface of the lower electrode in great quantities with better control compared to the method in which a high-frequency voltage is applied to the semiconductor substrate.
In addition, by forming the transitional layer through a heat treatment performed in a non-oxidizing atmosphere, excessive oxidation does not occur at the lower electrode and the barrier metal so that a good transitional layer constituted of an oxide layer (BaXSrYRuZTiWO3 layer) is achieved. Furthermore, if the heat treatment is performed at a low temperature of 500 centigrade or lower, a good transitional layer is formed since the lower electrode will not be oxidized even within the oxidizing atmosphere.
Moreover, by adding, for instance, a step in which a second dielectric film is formed on the first dielectric film which has been formed on the semiconductor substrate, a step in which a second area where the elements constituting the second dielectric film and the elements constituting the second conductive electrode are melded is formed, a step in which a transitional layer is formed by performing a heat treatment on the second meld area within a non-oxidizing atmosphere and a step in which a second conductive film is formed on the second dielectric film, a good interface is formed between the upper electrode and the dielectric film in addition to the interface between the lower electrode and the dielectric film. Thus, compared to the method for forming a good interface only between the dielectric film and the lower electrode, a further improvement is achieved in the capability for accumulating an electrical charge, and in particular, a capacitor having an extremely high capacity can be achieved even when the film thickness of the dielectric film is greatly reduced.
In addition, by adding, for instance, a step in which the upper electrode is formed on the second dielectric film while a high-frequency voltage is applied to the semiconductor substrate at which the second dielectric film has been formed in the formation of the second meld area, the sputtering quantities for the individual elements constituting the electrode that is driven into the second dielectric film can be varied in correspondence to the power of the high-frequency voltage applied to the semiconductor substrate, to achieve control over the composition of the meld area. Furthermore, by implementing this step in an oxidizing atmosphere with a higher oxygen concentration within the gas composition, the oxygen content in a specific meld area corresponding to the electrode film initial layer can be increased by achieving a more oxidized transitional layer.
Moreover, by performing a step in which the elements constituting the upper electrode are ion implanted onto the second dielectric film for the formation of the second meld area, the elements constituting the upper electrode can be melded into the surface of the dielectric film through the ion implantation technology and, as a result, compared to the method in which a high-frequency voltage is applied to the semiconductor substrate, the elements constituting the upper electrode can be melded into the surface of the dielectric substance in great quantities with better control.